This invention relates in general to arbitration systems and methods for an asynchronous bus computer system, and more particularly, to an arbitration system and method wherein control remains with the most recent previous user and under certain conditions access to the memory is allowed by the most recent previous requester while an arbitration cycle is occurring which will switch control to another requester. As a result of this overlap of the actual memory access cycle and a pending arbitration cycle the overall arbitration cycle, and therefore overall memory access time, is shorter.
There are currently available arbitration systems and methods for asynchronous bus computer systems. However, in these systems the access to a system resource such as a memory is ordinarily completed by a given requester before a subsequent arbitration cycle is begun. As a result the overall access time is relatively slow and becomes a significant factor at the higher clock speeds of recent computer systems.